Simulation Model for a Hardware Implementation of Modular Multiplication
نویسنده
چکیده
Modular multiplication is fundamental to several public-key cryptography systems such as the RSA encryption system. It is also the most dominant part of the computation performed in such systems. The operation is time consuming for large operands. This paper examines the characteristics of yet another architecture to implement modular multiplication. An experimental modular multiplier prototype is described in VHDL and simulated. The simulation results are presented. Key-Words:Modular multiplication, simulation, cryptosystems.
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تاریخ انتشار 2001